Recently, low power dynamic random access memory (DRAM) devices have been increasingly in demand with the development of mobile products. In particular, the DRAM devices employed in the mobile products have been focused on reduction of current that flows during a refresh operation.
The DRAM devices among semiconductor memory devices may lose data stored in their memory cells as the time elapses even while their power supplies are applied thereto, in contrast to static random access memory (SRAM) devices or flash memory devices. In order to retain data, DRAM devices are basically accompanied with operations for rewriting the data from external systems in a period often called “refresh” operations. Usually, such a refresh operation is carried out, in retention times that are inherent in memory cells of banks, by activating word lines at least once or more, and sensing/amplifying data of the memory cells. The retention time is a time for which data can be maintained without a refresh operation after being written into a memory cell.
FIG. 1 is a block diagram illustrating a bank including word lines of the conventional semiconductor memory device.
As illustrated in FIG. 1, the conventional semiconductor memory device includes first to fourth banks 1˜4 and each of the first to fourth banks 1˜4 has a plurality of word lines, for example, first to Nth word lines WL1, Wl2, . . . and WLN which are electrically connected to memory cells.
When the third word line WL3 of the second bank 2 is repeatedly activated to be driven to a high voltage level VPP higher than a power supply voltage, the voltage levels of the second and fourth word lines WL2 and WL4 disposed to be immediately adjacent to the third word line WL3 may also be boosted. Thus, undesirable leakage currents may flows through the memory cells connected to the second and fourth word lines WL2 and WL4, and the data stored in the memory cells connected to the second and fourth word lines WL2 and WL4 may be lost within the data retention time. Accordingly, a refresh characteristic of the semiconductor memory device may be degraded.